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?2008 fairchild semiconductor corporation 1 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module january 2008 motion-spm tm FSBB15CH60C smart power module features ? ul certified no.e209204(spm27-cc package) ? very low thermal resistance due to using dbc ? easy pcb layout due to built in bootstrap diode ? 600v-15a 3-phase igbt inverter bridge including control ics for gate driving and protection ? divided negative dc-link terminals for inverter current sensing applications ? single-grounded power supply due to built-in hvic ? isolation rating of 2500vrms/min. applications ? ac 100v ~ 253v three-phase inverter drive for small power ac motor drives ? home appliances applications li ke air conditioner and wash- ing machine general description it is an advanced motion-smart power module (motion-spm tm ) that fairchild has newly developed and designed to provide very compact and high performance ac motor drives mainly tar- geting low-power inverter-driven application like air conditioner and washing machine. it combines optimized circuit protection and drive matched to low-loss igbts. system reliability is fur- ther enhanced by the integrated under-voltage lock-out and short-circuit protection. the hi gh speed built-in hvic provides opto-coupler-less single-supply ig bt gate driving capability that further reduce the overall size of the inverter system design. each phase current of inverter can be monitored separately due to the divided negative dc terminals. figure 1. 44mm 26.8mm top view bottom view www..net
2 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module integrated power functions ? 600v-15a igbt inverter for three-phase dc/ac power conversion (pl ease refer to figure 3) integrated drive, protectio n and system control functions ? for inverter high-side igbts: gate drive ci rcuit, high voltage isolated high-speed level shifting control circuit under-voltage (uv) protection note) available bootstrap circuit exam ple is given in figures 12 and 13. ? for inverter low-side igbts: gate dr ive circuit, short ci rcuit protection (sc) control supply circuit under-v oltage (uv) protection ? fault signaling: corresponding to uv (low-side supply) and sc faults ? input interface: 3.3/5v cmos/lsttl compatible, schmitt trigger input pin configuration figure 2. top view www..net
3 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module pin descriptions pin number pin name pin description 1v cc(l) low-side common bias voltage for ic and igbts driving 2 com common supply ground 3in (ul) signal input for low-side u phase 4in (vl) signal input for low-side v phase 5in (wl) signal input for low-side w phase 6v fo fault output 7c fod capacitor for fault output duration time selection 8c sc capacitor (low-pass filter) for short-current detection input 9in (uh) signal input for high-side u phase 10 v cc(h) high-side common bias voltage for ic and igbts driving 11 v b(u) high-side bias voltage fo r u phase igbt driving 12 v s(u) high-side bias voltage ground for u phase igbt driving 13 in (vh) signal input for high-side v phase 14 v cc(h) high-side common bias voltage for ic and igbts driving 15 v b(v) high-side bias voltage fo r v phase igbt driving 16 v s(v) high-side bias voltage ground for v phase igbt driving 17 in (wh) signal input for high-side w phase 18 v cc(h) high-side common bias voltage for ic and igbts driving 19 v b(w) high-side bias voltage fo r w phase igbt driving 20 v s(w) high-side bias voltage ground for w phase igbt driving 21 n u negative dc?link input for u phase 22 n v negative dc?link input for v phase 23 n w negative dc?link input for w phase 24 u output for u phase 25 v output for v phase 26 w output for w phase 27 p positive dc?link input www..net
4 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module internal equivalent circ uit and input/output pins note: 1. inverter low-side is composed of three igbts, freewheeling diodes for each igbt and one control ic. it has gate drive and pr otection functions. 2. inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals. 3. inverter high-side is composed of three igbts, freewheeling diodes and three drive ics for each igbt. figure 3. com vcc in(ul) in(vl) in(wl) vfo c(fod) c(sc) out(ul) out(vl) out(wl) n u (21) n v (22) n w (23) u (24) v (25) w (26) p (27) (20) v s(w) (19) v b(w) (16) v s(v) (15) v b(v) (8) c sc (7) c fod (6) v fo (5) in (wl) (4) in (vl) (3) in (ul) (2) com (1) v cc(l) vcc vb out com vs in vb vs out in com vcc vcc vb out com vs in (18) v cc(h) (17) in (wh) (14) v cc(h) (13) in (vh) (12) v s(u) (11) v b(u) (10) v cc(h) (9) in (uh) v sl www..net
5 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module absolute maximum ratings (t j = 25c, unless otherwise specified) inverter part note: 1. the maximum junction temperature rating of the power chips integrated within the spm is 150 c(@t c 125 c). control part bootstrap diode part total system thermal resistance note: 2. for the measurement point of case temperature(t c ), please refer to figure 2. symbol parameter conditions rating units v pn supply voltage applied between p- n u , n v , n w 450 v v pn(surge) supply voltage (surge) applied between p- n u , n v , n w 500 v v ces collector-emitter voltage 600 v i c each igbt collector current t c = 25c 15 a i cp each igbt collector current (peak) t c = 25c, under 1ms pulse width 30 a p c collector dissipation t c = 25c per one chip 55 w t j operating junction temperature (note 1) -40 ~ 150 c symbol parameter conditions rating units v cc control supply voltage applied between v cc(h) , v cc(l) - com 20 v v bs high-side control bias voltage applied between v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) 20 v v in input signal voltage applied between in (uh) , in (vh) , in (wh) , in (ul) , in (vl) , in (wl) - com -0.3~17 v v fo fault output supply voltage applied between v fo - com -0.3~v cc +0.3 v i fo fault output current sink current at v fo pin 5 ma v sc current sensing input voltage applied between c sc - com -0.3~v cc +0.3 v symbol parameter conditions rating units v rrm maximum repetitive reverse voltage 600 v i f forward current t c = 25c 0.5 a i fp forward current (peak) t c = 25c, under 1ms pulse width 2 a t j operating junction temperature -40 ~ 150 c symbol parameter conditions rating units v pn(prot) self protection supply voltage limit (short circuit protection capability) v cc = v bs = 13.5 ~ 16.5v t j = 150c, non-repetitive, less than 2 s 400 v t c module case operation temperature -40 c t j 150 c, see figure 2 -40 ~ 125 c t stg storage temperature -40 ~ 150 c v iso isolation voltage 60hz, sinusoidal, ac 1 minute, connection pins to heat sink plate 2500 v rms symbol parameter conditions min. typ. max. units r th(j-c)q junction to case thermal resistance inverter igbt part (per 1/6 module) - - 2.27 c/w r th(j-c)f inverter fwd part (per 1/6 module) - - 3.0 c/w www..net
6 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module electrical characteristics (t j = 25c, unless otherwise specified) inverter part note: 3. t on and t off include the propagation delay time of the internal drive ic. t c(on) and t c(off) are the switching time of igbt itself under the given gate driving condition internally. for the detailed information, please see figure 4. control part note: 4. short-circuit current protection is functioning only at the low-sides. 5. the fault-out pulse width t fod depends on the capacitance value of c fod according to the following approximate equation : c fod = 18.3 x 10 -6 x t fod [f] symbol parameter conditions min. typ. max. units v ce(sat) collector-emitter saturation voltage v cc = v bs = 15v v in = 5v i c = 15a, t j = 25c - - 2.0 v v f fwd forward voltage v in = 0v i f = 15a, t j = 25c - - 2.2 v hs t on switching times v pn = 300v, v cc = v bs = 15v i c = 15a v in = 0v ? 5v, inductive load (note 3) -0.80- s t c(on) -0.20- s t off -0.40- s t c(off) -0.10- s t rr -0.10- s ls t on v pn = 300v, v cc = v bs = 15v i c = 15a v in = 0v ? 5v, inductive load (note 3) -0.50- s t c(on) -0.25- s t off -0.35- s t c(off) -0.10- s t rr -0.10- s i ces collector-emitter leakage current v ce = v ces --1ma symbol parameter conditions min. typ. max. units i qccl quiescent v cc supply current v cc = 15v in (ul, vl, wl) = 0v v cc(l) - com - - 23 ma i qcch v cc = 15v in (uh, vh, wh) = 0v v cc(h) - com - - 600 a i qbs quiescent v bs supply current v bs = 15v in (uh, vh, wh) = 0v v b(u) - v s(u) , v b(v) -v s(v) , v b(w) - v s(w) - - 500 a v foh fault output voltage v sc = 0v, v fo circuit: 4.7k to 5v pull-up 4.5 - - v v fol v sc = 1v, v fo circuit: 4.7k to 5v pull-up - - 0.8 v v sc(ref) short circuit trip level v cc = 15v (note 4) 0.45 0.5 0.55 v tsd over-temperature protec- tion temperature at lvic - 160 - c tsd over-temperature protec- tion hysterisis temperature at lvic - 5 - c uv ccd supply circuit under- voltage protection detection level 10.7 11.9 13.0 v uv ccr reset level 11.2 12.4 13.4 v uv bsd detection level 10 11 12 v uv bsr reset level 10.5 11.5 12.5 v t fod fault-out pulse width c fod = 33nf (note 5) 1.0 1.8 - ms v in(on) on threshold voltage applied between in (uh) , in (vh) , in (wh) , in (ul) , in (vl) , in (wl) - com 2.8 - - v v in(off) off threshold voltage - - 0.8 v www..net
7 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module figure 4. switching time definition switching loss (typical) figure 5. switching loss characteristics v ce i c v in t on t c(on) v in(on) 10% i c 10% v ce 90% i c 100% i c t rr 100% i c 0 v ce i c v in t off t c(off) v in(off) 10% v ce 10% i c (a) turn-on (b) turn-off 0246810121416 0 100 200 300 400 500 600 700 800 switching loss(on) vs. collector current v ce =300v v cc =15v v in =5v t j =25 t j =150 switching loss, e sw(on) [uj] collector current, i c [amperes] 0246810121416 0 50 100 150 200 250 300 350 400 450 500 switching loss(off) vs. collector current v ce =300v v cc =15v v in =5v t j =25 t j =150 switching loss, e sw(off) [uj] collector current, i c [amperes] www..net
8 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module bootstrap diode part note: 6. built in bootstrap diode includes around 15 ? resistance characteristic. figure 6. built in bootstrap diode characteristics recommended oper ating conditions symbol parameter conditions min. typ. max. units v f forward voltage i f = 0.1a, t c = 25c - 2.5 - v t rr reverse recovery time i f = 0.1a, t c = 25c - 80 - ns symbol parameter conditions value units min. typ. max. v pn supply voltage applied between p - n u , n v , n w - 300 400 v v cc control supply voltage applied between v cc(h) , v cc(l) - com 13.5 15 16.5 v v bs high-side bias voltage applied between v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) 13.0 15 18.5 v dv cc /dt, dv bs /dt control supply variation -1 - 1 v/ s t dead blanking time for preventing arm-short for each input signal 2.0 - - s f pwm pwm input signal -40 c t c 125c, -40 c t j 150c - - 20 khz v sen voltage for current sensing applied between n u , n v , n w - com (including surge voltage) -4 4 v 0123456789101112131415 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 built in bootstrap diode v f -i f characteristic t c =25 i f [a] v f [v] www..net
9 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module mechanical characteristics and ratings figure 7. flatness measurement position package marking and ordering information parameter conditions limits units min. typ. max. mounting torque mounting screw: - m3 recommended 0.62n?m 0.51 0.62 0.80 n?m device flatness note figure 5 0 - +120 m weight - 15.00 - g device marking device package reel size tape width quantity FSBB15CH60C FSBB15CH60C spm27-cc - - 10 ( + ) ( + ) ( + ) ( + ) www..net
10 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module time charts of spms protective function a1 : control supply voltage rises: after the voltage rises uv ccr , the circuits start to operate when next input is applied. a2 : normal operation: igbt on and carrying current. a3 : under voltage detection (uv ccd ). a4 : igbt off in spite of control input condition. a5 : fault output operation starts. a6 : under voltage reset (uv ccr ). a7 : normal operation: igbt on and carrying current. figure 8. under-voltage protection (low-side) b1 : control supply voltage rises: after the voltage reaches uv bsr , the circuits start to operate when next input is applied. b2 : normal operation: igbt on and carrying current. b3 : under voltage detection (uv bsd ). b4 : igbt off in spite of control input c ondition, but there is no fault output signal. b5 : under voltage reset (uv bsr ) b6 : normal operation: igbt on and carrying current figure 9. under-voltage protection (high-side) input signal output current fault output signal control supply voltage reset uv ccr protection circuit state set reset uv ccd a1 a3 a2 a4 a6 a5 a7 input signal output current fault output signal control supply voltage reset uv bsr protection circuit state set reset uv bsd b1 b3 b2 b4 b6 b5 high-level (no fault output) www..net
11 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module (with the external shunt resistance and cr connection) c1 : normal operation: igbt on and carrying current. c2 : short circuit current detection (sc trigger). c3 : hard igbt gate interrupt. c4 : igbt turns off. c5 : fault output timer operation starts: the pulse width of t he fault output signal is set by the external capacitor c fo . c6 : input ?l? : igbt off state. c7 : input ?h?: igbt on state, but during the acti ve period of fault output the igbt doesn?t turn on. c8 : igbt off state figure 10. short-circuit current pr otection (low-side operation only) internal igbt gate-emitter voltage lower arms control input output current sensing voltage of the shunt resistance fault output signal sc reference voltage cr circuit time constant delay sc protection circuit state set reset c6 c7 c3 c2 c1 c8 c4 c5 www..net
12 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module note: 1) rc coupling at each input might change depending on the pwm control scheme used in the application and the wiring impedance of the application?s printed circuit board. the spm input signal section integrates 5k ( typ.) pull-down resistor. therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input ter- minal. 2) the logic input is compatible with standard cmos or lsttl outputs. figure 11. recommended cpu i/o interface circuit note: 1) the ceramic capacitor placed between v cc -com should be over 1uf and mounted as close to the pins of the spm as possible. figure 12. recommended bootstrap operation circuit and parameters cpu com 5v-line ,, in (ul) in (vl) in (wl) ,, in (uh) in (vh) in (wh) v fo 1nf spm c pf = 1nf r pf =4.7 ? 100 ? 100 ? 1 nf 1 nf 100 ? 15v-line 22uf 0.1uf 1000uf 1uf one-leg diagram of spm inverter output p n these values depend on pwm control algorithm vcc in com vb ho vs vcc in com out v sl www..net
13 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module note: 1) to avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm) 2) by virtue of integrating an application specific type hvic inside the spm, direct coupling to cpu terminals without any opto -coupler or transformer isolation is possible. 3) v fo output is open collector type. this signal line should be pulled up to the positive side of the 5v power supply with approxima tely 4.7k resistance. please refer to figure11. 4) c sp15 of around 7 times larger than bootstrap capacitor c bs is recommended. 5) v fo output pulse width should be determined by connecting an external capacitor(c fod ) between c fod (pin7) and com(pin2). (example : if c fod = 33 nf, then t fo = 1.8ms (typ.)) please refer to the note 5 for calculation method. 6) input signal is high-active type. there is a 5k resistor inside the ic to pull down each input signal line to gnd. rc coupling circuits should be adopted for the prevention o f input signal oscillation. r s c ps time constant should be selected in the range 50~150ns . c ps should not be less than 1nf. ( recommended r s =100 ? , c ps =1nf) 7) to prevent errors of the protection function, the wiring around r f and c sc should be as short as possible. 8) in the short-circuit protection circuit, please select the r f c sc time constant in the range 1.5~2 s. 9) each capacitor should be mounted as close to the pins of the spm as possible. 10) to prevent surge destruction, the wiring between the smoothing capacitor and the p&gnd pins should be as short as possible . the use of a high frequency non-inductive capacitor of around 0.1~0.22 f between the p&gnd pins is recommended. 11) relays are used at almost every systems of electrical equipmen ts of home appliances. in these cases, there should be suffi cient distance between the cpu and the relays. 12) c spc15 should be over 1 f and mounted as close to the pins of the spm as possible. figure 13. typical application circuit fault 15v line c bs c bsc c bs c bsc c bs c bsc c sp15 c spc15 c fod 5v line r pf c bpf r s m vdc c dcs gating uh gating vh gating wh gating wl gating vl gating ul c pf c p u r fu r fv r fw r su r sv r sw c fu c fv c fw w-phase current v-phase current u-phase current r f com vcc in(ul) in(vl) in(w l) vfo c(fod) c(sc) out(ul) out(vl) out(wl) n u (21) n v (22) n w (23) u (24) v (25) w (26) p (27) (20) v s(w) (19) v b(w) (16) v s(v) (15) v b(v) (8) c sc (7) c fod (6) v fo (5) in (wl) (4) in (vl) (3) in (ul) (2) com (1) v cc(l) vcc vb out com vs in vb vs out in com vcc vcc vb out com vs in (18) v cc(h) (17) in (wh) (14) v cc(h) (13) in (vh) (12) v s(u) (11) v b(u) (10) v cc(h) (9) in (uh) input signal for short-circuit protection c sc v sl r s r s r s r s r s r s c ps c ps c ps c ps c ps c ps www..net
14 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module detailed package outline drawings www..net
15 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module detailed package outline drawings (continued) www..net
16 www.fairchildsemi.com FSBB15CH60C rev. d FSBB15CH60C smart power module detailed package outline drawings (continued) www..net
rev. i28 trademarks the following are registered and unregistered trademarks and servic e marks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. disclaimer fairchild semiconductor reserves the right to make changes without further no tice to any products herein to improve reliability, function, or design. fa irchild does not assume any liability arising out of the application or use of any product or circuit descri bed herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically th e warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semicon ductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose fail ure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms acex ? build it now? coreplus? crossvolt ? ctl? current transfer logic? ecospark ? fact quiet series? fact ? fast ? fastvcore? fps? frfet ? global power resource sm green fps? green fps? e-series? gto? i-lo ? intellimax? isoplanar? megabuck? microcoupler? micropak? motion-spm? optologic ? optoplanar ? pdp-spm? power220 ? power247 ? poweredge ? power-spm? powertrench ? programmable active droop? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? smart start? spm ? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 syncfet? the power franchise ? ? tinyboost? tinybuck? tinylogic ? tinyopto? tinypower? tinypwm? tinywire? serdes? uhc ? unifet? vcx? datasheet identification product status definition advance information for mative or in design this datasheet contains the design s pecifications for product development. specifications may change in any manner without notice. preliminary first production this datasheet contains preliminary data; supplementary data will be pub- lished at a later date. fairchild semic onductor reserves the right to make changes at any time without notice to improve design. no identification needed full production this datasheet contains final specifications. fairchil d semiconductor reserves the right to make changes at any time without notice to improve design. obsolete not in production this datasheet contains specificati ons on a product that has been discontin- ued by fairchild semiconductor. the dat asheet is printed for reference infor- mation only. www..net

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